[Avida-SVN] r3384 - in development/source: cpu main
beckma24 at myxo.css.msu.edu
beckma24 at myxo.css.msu.edu
Wed Aug 26 07:18:52 PDT 2009
Author: beckma24
Date: 2009-08-26 10:18:52 -0400 (Wed, 26 Aug 2009)
New Revision: 3384
Modified:
development/source/cpu/cHardwareCPU.cc
development/source/cpu/cHardwareCPU.h
development/source/main/cTaskLib.cc
Log:
Adding pheromone sensing, bit masking, and conditional instructions that use AX by default.
Modified: development/source/cpu/cHardwareCPU.cc
===================================================================
--- development/source/cpu/cHardwareCPU.cc 2009-08-24 20:47:13 UTC (rev 3383)
+++ development/source/cpu/cHardwareCPU.cc 2009-08-26 14:18:52 UTC (rev 3384)
@@ -90,6 +90,8 @@
tInstLibEntry<tMethod>("nop-X", &cHardwareCPU::Inst_Nop, 0, "True no-operation instruction: does nothing"),
tInstLibEntry<tMethod>("if-equ-0", &cHardwareCPU::Inst_If0, 0, "Execute next instruction if ?BX?==0, else skip it"),
tInstLibEntry<tMethod>("if-not-0", &cHardwareCPU::Inst_IfNot0, 0, "Execute next instruction if ?BX?!=0, else skip it"),
+ tInstLibEntry<tMethod>("if-equ-0-defaultAX", &cHardwareCPU::Inst_If0_defaultAX, 0, "Execute next instruction if ?AX?==0, else skip it"),
+ tInstLibEntry<tMethod>("if-not-0-defaultAX", &cHardwareCPU::Inst_IfNot0_defaultAX, 0, "Execute next instruction if ?AX?!=0, else skip it"),
tInstLibEntry<tMethod>("if-n-equ", &cHardwareCPU::Inst_IfNEqu, nInstFlag::DEFAULT, "Execute next instruction if ?BX?!=?CX?, else skip it"),
tInstLibEntry<tMethod>("if-equ", &cHardwareCPU::Inst_IfEqu, 0, "Execute next instruction if ?BX?==?CX?, else skip it"),
tInstLibEntry<tMethod>("if-grt-0", &cHardwareCPU::Inst_IfGr0),
@@ -488,12 +490,19 @@
// Bit Masking (higher order bit masking is possible, just add the instructions if needed)
tInstLibEntry<tMethod>("mask-signbit", &cHardwareCPU::Inst_MaskSignBit),
tInstLibEntry<tMethod>("maskoff-lower16bits", &cHardwareCPU::Inst_MaskOffLower16Bits),
+ tInstLibEntry<tMethod>("maskoff-lower16bits-defaultAX", &cHardwareCPU::Inst_MaskOffLower16Bits_defaultAX),
tInstLibEntry<tMethod>("maskoff-lower15bits", &cHardwareCPU::Inst_MaskOffLower15Bits),
+ tInstLibEntry<tMethod>("maskoff-lower15bits-defaultAX", &cHardwareCPU::Inst_MaskOffLower15Bits_defaultAX),
tInstLibEntry<tMethod>("maskoff-lower14bits", &cHardwareCPU::Inst_MaskOffLower14Bits),
+ tInstLibEntry<tMethod>("maskoff-lower14bits-defaultAX", &cHardwareCPU::Inst_MaskOffLower14Bits_defaultAX),
tInstLibEntry<tMethod>("maskoff-lower13bits", &cHardwareCPU::Inst_MaskOffLower13Bits),
+ tInstLibEntry<tMethod>("maskoff-lower13bits-defaultAX", &cHardwareCPU::Inst_MaskOffLower13Bits_defaultAX),
tInstLibEntry<tMethod>("maskoff-lower12bits", &cHardwareCPU::Inst_MaskOffLower12Bits),
+ tInstLibEntry<tMethod>("maskoff-lower12bits-defaultAX", &cHardwareCPU::Inst_MaskOffLower12Bits_defaultAX),
tInstLibEntry<tMethod>("maskoff-lower8bits", &cHardwareCPU::Inst_MaskOffLower8Bits),
+ tInstLibEntry<tMethod>("maskoff-lower8bits-defaultAX", &cHardwareCPU::Inst_MaskOffLower8Bits_defaultAX),
tInstLibEntry<tMethod>("maskoff-lower4bits", &cHardwareCPU::Inst_MaskOffLower4Bits),
+ tInstLibEntry<tMethod>("maskoff-lower4bits-defaultAX", &cHardwareCPU::Inst_MaskOffLower4Bits_defaultAX),
// Energy usage
@@ -534,6 +543,7 @@
tInstLibEntry<tMethod>("sense-pheromone-faced", &cHardwareCPU::Inst_SensePheromoneFaced),
tInstLibEntry<tMethod>("sense-pheromone-inDemeGlobal", &cHardwareCPU::Inst_SensePheromoneInDemeGlobal),
tInstLibEntry<tMethod>("sense-pheromone-global", &cHardwareCPU::Inst_SensePheromoneGlobal),
+ tInstLibEntry<tMethod>("sense-pheromone-global-defaultAX", &cHardwareCPU::Inst_SensePheromoneGlobal_defaultAX),
tInstLibEntry<tMethod>("exploit", &cHardwareCPU::Inst_Exploit, nInstFlag::STALL),
tInstLibEntry<tMethod>("exploit-forward5", &cHardwareCPU::Inst_ExploitForward5, nInstFlag::STALL),
tInstLibEntry<tMethod>("exploit-forward3", &cHardwareCPU::Inst_ExploitForward3, nInstFlag::STALL),
@@ -1886,6 +1896,22 @@
return true;
}
+// Same as Inst_If0, except AX is used by default, not BX
+bool cHardwareCPU::Inst_If0_defaultAX(cAvidaContext& ctx) // Execute next if ?ax? ==0.
+{
+ const int reg_used = FindModifiedRegister(REG_AX);
+ if (GetRegister(reg_used) != 0) IP().Advance();
+ return true;
+}
+
+// Same as Inst_IfNot0, except AX is used by default, not BX
+bool cHardwareCPU::Inst_IfNot0_defaultAX(cAvidaContext& ctx) // Execute next if ?ax? != 0.
+{
+ const int reg_used = FindModifiedRegister(REG_AX);
+ if (GetRegister(reg_used) == 0) IP().Advance();
+ return true;
+}
+
bool cHardwareCPU::Inst_IfEqu(cAvidaContext& ctx) // Execute next if bx == ?cx?
{
const int op1 = FindModifiedRegister(REG_BX);
@@ -6924,55 +6950,104 @@
return true;
}
-// masks lower 16 bits in a register
+// masks lower 16 bits in ?BX? register
bool cHardwareCPU::Inst_MaskOffLower16Bits(cAvidaContext& ctx) {
const int reg = FindModifiedRegister(REG_BX);
GetRegister(reg) = GetRegister(reg) & MASKOFF_LOWEST16;
return true;
}
-// masks lower 15 bits in a register
+// masks lower 16 bits in ?AX? register
+bool cHardwareCPU::Inst_MaskOffLower16Bits_defaultAX(cAvidaContext& ctx) {
+ const int reg = FindModifiedRegister(REG_AX);
+ GetRegister(reg) = GetRegister(reg) & MASKOFF_LOWEST16;
+ return true;
+}
+
+// masks lower 15 bits in ?BX? register
bool cHardwareCPU::Inst_MaskOffLower15Bits(cAvidaContext& ctx) {
const int reg = FindModifiedRegister(REG_BX);
GetRegister(reg) = GetRegister(reg) & MASKOFF_LOWEST15;
return true;
}
-// masks lower 14 bits in a register
+// masks lower 15 bits in ?AX? register
+bool cHardwareCPU::Inst_MaskOffLower15Bits_defaultAX(cAvidaContext& ctx) {
+ const int reg = FindModifiedRegister(REG_AX);
+ GetRegister(reg) = GetRegister(reg) & MASKOFF_LOWEST15;
+ return true;
+}
+
+// masks lower 14 bits in ?BX? register
bool cHardwareCPU::Inst_MaskOffLower14Bits(cAvidaContext& ctx) {
const int reg = FindModifiedRegister(REG_BX);
GetRegister(reg) = GetRegister(reg) & MASKOFF_LOWEST14;
return true;
}
-// masks lower 13 bits in a register
+// masks lower 14 bits in ?AX? register
+bool cHardwareCPU::Inst_MaskOffLower14Bits_defaultAX(cAvidaContext& ctx) {
+ const int reg = FindModifiedRegister(REG_AX);
+ GetRegister(reg) = GetRegister(reg) & MASKOFF_LOWEST14;
+ return true;
+}
+
+// masks lower 13 bits in ?BX? register
bool cHardwareCPU::Inst_MaskOffLower13Bits(cAvidaContext& ctx) {
const int reg = FindModifiedRegister(REG_BX);
GetRegister(reg) = GetRegister(reg) & MASKOFF_LOWEST13;
return true;
}
-// masks lower 12 bits in a register
+// masks lower 13 bits in ?AX? register
+bool cHardwareCPU::Inst_MaskOffLower13Bits_defaultAX(cAvidaContext& ctx) {
+ const int reg = FindModifiedRegister(REG_AX);
+ GetRegister(reg) = GetRegister(reg) & MASKOFF_LOWEST13;
+ return true;
+}
+
+// masks lower 12 bits in ?BX? register
bool cHardwareCPU::Inst_MaskOffLower12Bits(cAvidaContext& ctx) {
const int reg = FindModifiedRegister(REG_BX);
GetRegister(reg) = GetRegister(reg) & MASKOFF_LOWEST12;
return true;
}
-// masks lower 8 bits in a register
+// masks lower 12 bits in ?AX? register
+bool cHardwareCPU::Inst_MaskOffLower12Bits_defaultAX(cAvidaContext& ctx) {
+ const int reg = FindModifiedRegister(REG_AX);
+ GetRegister(reg) = GetRegister(reg) & MASKOFF_LOWEST12;
+ return true;
+}
+
+// masks lower 8 bits in ?BX? register
bool cHardwareCPU::Inst_MaskOffLower8Bits(cAvidaContext& ctx) {
const int reg = FindModifiedRegister(REG_BX);
GetRegister(reg) = GetRegister(reg) & MASKOFF_LOWEST8;
return true;
}
-// masks lower 4 bits in a register
+// masks lower 8 bits in ?AX? register
+bool cHardwareCPU::Inst_MaskOffLower8Bits_defaultAX(cAvidaContext& ctx) {
+ const int reg = FindModifiedRegister(REG_AX);
+ GetRegister(reg) = GetRegister(reg) & MASKOFF_LOWEST8;
+ return true;
+}
+
+// masks lower 4 bits in ?BX? register
bool cHardwareCPU::Inst_MaskOffLower4Bits(cAvidaContext& ctx) {
const int reg = FindModifiedRegister(REG_BX);
GetRegister(reg) = GetRegister(reg) & MASKOFF_LOWEST4;
return true;
}
+// masks lower 4 bits in ?AX? register
+bool cHardwareCPU::Inst_MaskOffLower4Bits_defaultAX(cAvidaContext& ctx) {
+ const int reg = FindModifiedRegister(REG_AX);
+ GetRegister(reg) = GetRegister(reg) & MASKOFF_LOWEST4;
+ return true;
+}
+
/*! Send a message to the organism that is currently faced by this cell,
where the label field of sent message is from register ?BX?, and the data field
is from register ~?BX?.
@@ -7306,11 +7381,11 @@
} //End DoSensePheromone()
-bool cHardwareCPU::DoSensePheromoneInDemeGlobal(cAvidaContext& ctx) {
+bool cHardwareCPU::DoSensePheromoneInDemeGlobal(cAvidaContext& ctx, tRegisters REG_DEFAULT) {
if(m_organism->GetCellID() == -1) {
return false;
}
- int reg_to_set = FindModifiedRegister(REG_BX);
+ int reg_to_set = FindModifiedRegister(REG_DEFAULT);
cDeme& deme = m_world->GetPopulation().GetDeme(m_organism->GetDemeID());
const cResourceCount& deme_resource_count = deme.GetDemeResourceCount();
@@ -7326,8 +7401,8 @@
return true;
}
-bool cHardwareCPU::DoSensePheromoneGlobal(cAvidaContext& ctx) {
- int reg_to_set = FindModifiedRegister(REG_BX);
+bool cHardwareCPU::DoSensePheromoneGlobal(cAvidaContext& ctx, tRegisters REG_DEFAULT) {
+ int reg_to_set = FindModifiedRegister(REG_DEFAULT);
const cResourceLib& resLib = m_world->GetEnvironment().GetResourceLib();
@@ -7375,13 +7450,17 @@
} //End Inst_SensePheromoneFacing()
bool cHardwareCPU::Inst_SensePheromoneInDemeGlobal(cAvidaContext& ctx) {
- return DoSensePheromoneInDemeGlobal(ctx);
+ return DoSensePheromoneInDemeGlobal(ctx, REG_BX);
}
bool cHardwareCPU::Inst_SensePheromoneGlobal(cAvidaContext& ctx) {
- return DoSensePheromoneGlobal(ctx);
+ return DoSensePheromoneGlobal(ctx, REG_BX);
}
+bool cHardwareCPU::Inst_SensePheromoneGlobal_defaultAX(cAvidaContext& ctx) {
+ return DoSensePheromoneGlobal(ctx, REG_AX);
+}
+
bool cHardwareCPU::Inst_Exploit(cAvidaContext& ctx)
{
int num_rotations = 0;
Modified: development/source/cpu/cHardwareCPU.h
===================================================================
--- development/source/cpu/cHardwareCPU.h 2009-08-24 20:47:13 UTC (rev 3383)
+++ development/source/cpu/cHardwareCPU.h 2009-08-26 14:18:52 UTC (rev 3384)
@@ -328,6 +328,8 @@
bool Inst_If0(cAvidaContext& ctx);
bool Inst_IfEqu(cAvidaContext& ctx);
bool Inst_IfNot0(cAvidaContext& ctx);
+ bool Inst_If0_defaultAX(cAvidaContext& ctx);
+ bool Inst_IfNot0_defaultAX(cAvidaContext& ctx);
bool Inst_IfNEqu(cAvidaContext& ctx);
bool Inst_IfGr0(cAvidaContext& ctx);
bool Inst_IfGr(cAvidaContext& ctx);
@@ -714,12 +716,19 @@
// Bit masking instructions
bool Inst_MaskSignBit(cAvidaContext& ctx);
bool Inst_MaskOffLower16Bits(cAvidaContext& ctx);
+ bool Inst_MaskOffLower16Bits_defaultAX(cAvidaContext& ctx);
bool Inst_MaskOffLower15Bits(cAvidaContext& ctx);
+ bool Inst_MaskOffLower15Bits_defaultAX(cAvidaContext& ctx);
bool Inst_MaskOffLower14Bits(cAvidaContext& ctx);
+ bool Inst_MaskOffLower14Bits_defaultAX(cAvidaContext& ctx);
bool Inst_MaskOffLower13Bits(cAvidaContext& ctx);
+ bool Inst_MaskOffLower13Bits_defaultAX(cAvidaContext& ctx);
bool Inst_MaskOffLower12Bits(cAvidaContext& ctx);
+ bool Inst_MaskOffLower12Bits_defaultAX(cAvidaContext& ctx);
bool Inst_MaskOffLower8Bits(cAvidaContext& ctx);
+ bool Inst_MaskOffLower8Bits_defaultAX(cAvidaContext& ctx);
bool Inst_MaskOffLower4Bits(cAvidaContext& ctx);
+ bool Inst_MaskOffLower4Bits_defaultAX(cAvidaContext& ctx);
//// Messaging ////
bool Inst_SendMessage(cAvidaContext& ctx);
@@ -800,12 +809,13 @@
bool Inst_SenseTarget(cAvidaContext& ctx);
bool Inst_SenseTargetFaced(cAvidaContext& ctx);
bool DoSensePheromone(cAvidaContext& ctx, int cellid);
- bool DoSensePheromoneInDemeGlobal(cAvidaContext& ctx);
- bool DoSensePheromoneGlobal(cAvidaContext& ctx);
+ bool DoSensePheromoneInDemeGlobal(cAvidaContext& ctx, tRegisters REG_DEFAULT);
+ bool DoSensePheromoneGlobal(cAvidaContext& ctx, tRegisters REG_DEFAULT);
bool Inst_SensePheromone(cAvidaContext& ctx);
bool Inst_SensePheromoneFaced(cAvidaContext& ctx);
bool Inst_SensePheromoneInDemeGlobal(cAvidaContext& ctx);
bool Inst_SensePheromoneGlobal(cAvidaContext& ctx);
+ bool Inst_SensePheromoneGlobal_defaultAX(cAvidaContext& ctx);
bool Inst_Exploit(cAvidaContext& ctx);
bool Inst_ExploitForward5(cAvidaContext& ctx);
bool Inst_ExploitForward3(cAvidaContext& ctx);
Modified: development/source/main/cTaskLib.cc
===================================================================
--- development/source/main/cTaskLib.cc 2009-08-24 20:47:13 UTC (rev 3383)
+++ development/source/main/cTaskLib.cc 2009-08-26 14:18:52 UTC (rev 3384)
@@ -696,8 +696,6 @@
return 0.0;
}
-////////////////////////////////////
-
double cTaskLib::Task_Nand_ResourceDependent(cTaskContext& ctx) const {
const double resCrossoverLevel = 100;
@@ -719,8 +717,6 @@
pher_amount += resource_count_array[res->GetID()];
}
-// double diff = fabs(resCrossoverLevel - pher_amount);
-// double reward = pow(diff, 2) * 25;
if(pher_amount < resCrossoverLevel)
return 1.0;
return 0.0;
@@ -747,16 +743,11 @@
pher_amount += resource_count_array[res->GetID()];
}
-// double diff = fabs(resCrossoverLevel - pher_amount);
-// double reward = pow(diff, 2) * 25;
if(pher_amount > resCrossoverLevel)
return 1.0;
return 0.0;
}
-////////////////////////////////////
-
-
double cTaskLib::Task_Logic3in_AA(cTaskContext& ctx) const
{
const int logic_id = ctx.GetLogicId();
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