[Avida-SVN] r1671 - in branches/uml/source: cpu main
hjg at myxo.css.msu.edu
hjg at myxo.css.msu.edu
Tue Jun 12 10:38:24 PDT 2007
Author: hjg
Date: 2007-06-12 13:38:24 -0400 (Tue, 12 Jun 2007)
New Revision: 1671
Modified:
branches/uml/source/cpu/cHardwareCPU.cc
branches/uml/source/cpu/cHardwareCPU.h
branches/uml/source/main/cTaskLib.cc
branches/uml/source/main/cUMLModel.cc
branches/uml/source/main/cUMLStateDiagram.cc
branches/uml/source/main/cUMLStateDiagram.h
Log:
Changed instructions to use terminals to represent labels and states.
Modified: branches/uml/source/cpu/cHardwareCPU.cc
===================================================================
--- branches/uml/source/cpu/cHardwareCPU.cc 2007-06-12 15:58:26 UTC (rev 1670)
+++ branches/uml/source/cpu/cHardwareCPU.cc 2007-06-12 17:38:24 UTC (rev 1671)
@@ -356,9 +356,9 @@
/*
tInstLibEntry<tMethod>("addTransLab", &cHardwareCPU::Inst_AddTransitionLabel, false,
"Add a transition label"),
+*/
tInstLibEntry<tMethod>("addTrans", &cHardwareCPU::Inst_AddTransition, false,
- "Add a transition"),
-*/
+ "Add a transition"),
tInstLibEntry<tMethod>("addTransT", &cHardwareCPU::Inst_AddTransitionTotal, false,
"Add a transition without adding a label."),
tInstLibEntry<tMethod>("jump", &cHardwareCPU::Inst_JumpIndex, false,
@@ -370,6 +370,75 @@
*/
tInstLibEntry<tMethod>("jump-d", &cHardwareCPU::Inst_JumpDist, false,
"Jump to a position in the list using labels."),
+
+ tInstLibEntry<tMethod>("sd-0", &cHardwareCPU::Inst_StateDiag0, false,
+ "Change to state diagram 0"),
+ tInstLibEntry<tMethod>("sd-1", &cHardwareCPU::Inst_StateDiag1, false,
+ "Change to state diagram 1"),
+ tInstLibEntry<tMethod>("s-orig-0", &cHardwareCPU::Inst_OrigState0, false,
+ "Change the origin to state 0"),
+ tInstLibEntry<tMethod>("s-orig-1", &cHardwareCPU::Inst_OrigState1, false,
+ "Change the origin to state 1"),
+ tInstLibEntry<tMethod>("s-orig-2", &cHardwareCPU::Inst_OrigState2, false,
+ "Change the origin to state 2"),
+ tInstLibEntry<tMethod>("s-orig-3", &cHardwareCPU::Inst_OrigState3, false,
+ "Change the origin to state 3"),
+ tInstLibEntry<tMethod>("s-orig-4", &cHardwareCPU::Inst_OrigState4, false,
+ "Change the origin to state 4"),
+ tInstLibEntry<tMethod>("s-orig-5", &cHardwareCPU::Inst_OrigState5, false,
+ "Change the origin to state 5"),
+ tInstLibEntry<tMethod>("s-orig-6", &cHardwareCPU::Inst_OrigState6, false,
+ "Change the origin to state 6"),
+ tInstLibEntry<tMethod>("s-orig-7", &cHardwareCPU::Inst_OrigState7, false,
+ "Change the origin to state 7"),
+ tInstLibEntry<tMethod>("s-orig-8", &cHardwareCPU::Inst_OrigState8, false,
+ "Change the origin to state 8"),
+ tInstLibEntry<tMethod>("s-orig-9", &cHardwareCPU::Inst_OrigState9, false,
+ "Change the origin to state 9"),
+ tInstLibEntry<tMethod>("s-dest-0", &cHardwareCPU::Inst_DestState0, false,
+ "Change the destination to state 0"),
+ tInstLibEntry<tMethod>("s-dest-1", &cHardwareCPU::Inst_DestState1, false,
+ "Change the destination to state 1"),
+ tInstLibEntry<tMethod>("s-dest-2", &cHardwareCPU::Inst_DestState2, false,
+ "Change the destination to state 2"),
+ tInstLibEntry<tMethod>("s-dest-3", &cHardwareCPU::Inst_DestState3, false,
+ "Change the destination to state 3"),
+ tInstLibEntry<tMethod>("s-dest-4", &cHardwareCPU::Inst_DestState4, false,
+ "Change the destination to state 4"),
+ tInstLibEntry<tMethod>("s-dest-5", &cHardwareCPU::Inst_DestState5, false,
+ "Change the destination to state 5"),
+ tInstLibEntry<tMethod>("s-dest-6", &cHardwareCPU::Inst_DestState6, false,
+ "Change the destination to state 6"),
+ tInstLibEntry<tMethod>("s-dest-7", &cHardwareCPU::Inst_DestState7, false,
+ "Change the destination to state 7"),
+ tInstLibEntry<tMethod>("s-dest-8", &cHardwareCPU::Inst_DestState8, false,
+ "Change the destination to state 8"),
+ tInstLibEntry<tMethod>("s-dest-9", &cHardwareCPU::Inst_DestState9, false,
+ "Change the destination to state 9"),
+ tInstLibEntry<tMethod>("trans-0", &cHardwareCPU::Inst_TransLab0, false,
+ "Change to transition label 0"),
+ tInstLibEntry<tMethod>("trans-1", &cHardwareCPU::Inst_TransLab1, false,
+ "Change to transition label 1"),
+ tInstLibEntry<tMethod>("trans-2", &cHardwareCPU::Inst_TransLab2, false,
+ "Change to transition label 2"),
+ tInstLibEntry<tMethod>("trans-3", &cHardwareCPU::Inst_TransLab3, false,
+ "Change to transition label 3"),
+ tInstLibEntry<tMethod>("trans-4", &cHardwareCPU::Inst_TransLab4, false,
+ "Change to transition label 4"),
+ tInstLibEntry<tMethod>("trans-5", &cHardwareCPU::Inst_TransLab5, false,
+ "Change to transition label 5"),
+ tInstLibEntry<tMethod>("trans-6", &cHardwareCPU::Inst_TransLab6, false,
+ "Change to transition label 6"),
+ tInstLibEntry<tMethod>("trans-7", &cHardwareCPU::Inst_TransLab7, false,
+ "Change to transition label 7"),
+ tInstLibEntry<tMethod>("trans-8", &cHardwareCPU::Inst_TransLab8, false,
+ "Change to transition label 8"),
+ tInstLibEntry<tMethod>("trans-9", &cHardwareCPU::Inst_TransLab9, false,
+ "Change to transition label 9"),
+ tInstLibEntry<tMethod>("trans-10", &cHardwareCPU::Inst_TransLab10, false,
+ "Change to transition label 10"),
+ tInstLibEntry<tMethod>("trans-11", &cHardwareCPU::Inst_TransLab11, false,
+ "Change to transition label 11"),
// Placebo instructions
tInstLibEntry<tMethod>("skip", &cHardwareCPU::Inst_Skip),
@@ -3423,6 +3492,8 @@
bool cHardwareCPU::Inst_HeadDivide(cAvidaContext& ctx)
{
// modified for UML branch
+ organism->modelCheck(ctx);
+
return Inst_HeadDivideMut(ctx, 1);
}
@@ -4156,15 +4227,15 @@
}
-/*
+
bool cHardwareCPU::Inst_AddTransition(cAvidaContext& ctx)
{
if(organism->GetCellID()==-1) return false;
return organism->getStateDiagram()->addTransition();
}
-*/
+
bool cHardwareCPU::Inst_AddTransitionTotal(cAvidaContext& ctx)
{
if(organism->GetCellID()==-1) return false;
@@ -4175,3 +4246,108 @@
}
+bool cHardwareCPU::Inst_StateDiag0(cAvidaContext& ctx)
+{ return (organism->absoluteJumpStateDiagram(0)); }
+
+bool cHardwareCPU::Inst_StateDiag1(cAvidaContext& ctx)
+{ return (organism->absoluteJumpStateDiagram(1)); }
+
+bool cHardwareCPU::Inst_OrigState0(cAvidaContext& ctx)
+{ return (organism->getStateDiagram()->absoluteJumpOriginState(0)); }
+
+bool cHardwareCPU::Inst_OrigState1(cAvidaContext& ctx)
+{ return (organism->getStateDiagram()->absoluteJumpOriginState(1)); }
+
+bool cHardwareCPU::Inst_OrigState2(cAvidaContext& ctx)
+{ return (organism->getStateDiagram()->absoluteJumpOriginState(2)); }
+
+bool cHardwareCPU::Inst_OrigState3(cAvidaContext& ctx)
+{ return (organism->getStateDiagram()->absoluteJumpOriginState(3)); }
+
+bool cHardwareCPU::Inst_OrigState4(cAvidaContext& ctx)
+{ return (organism->getStateDiagram()->absoluteJumpOriginState(4)); }
+
+bool cHardwareCPU::Inst_OrigState5(cAvidaContext& ctx)
+{ return (organism->getStateDiagram()->absoluteJumpOriginState(5)); }
+
+bool cHardwareCPU::Inst_OrigState6(cAvidaContext& ctx)
+{ return (organism->getStateDiagram()->absoluteJumpOriginState(6)); }
+
+bool cHardwareCPU::Inst_OrigState7(cAvidaContext& ctx)
+{ return (organism->getStateDiagram()->absoluteJumpOriginState(7)); }
+
+bool cHardwareCPU::Inst_OrigState8(cAvidaContext& ctx)
+{ return (organism->getStateDiagram()->absoluteJumpOriginState(8)); }
+
+bool cHardwareCPU::Inst_OrigState9(cAvidaContext& ctx)
+{ return (organism->getStateDiagram()->absoluteJumpOriginState(9)); }
+
+bool cHardwareCPU::Inst_DestState0(cAvidaContext& ctx)
+{ return (organism->getStateDiagram()->absoluteJumpDestinationState(0)); }
+
+bool cHardwareCPU::Inst_DestState1(cAvidaContext& ctx)
+{ return (organism->getStateDiagram()->absoluteJumpDestinationState(1)); }
+
+bool cHardwareCPU::Inst_DestState2(cAvidaContext& ctx)
+{ return (organism->getStateDiagram()->absoluteJumpDestinationState(2)); }
+
+bool cHardwareCPU::Inst_DestState3(cAvidaContext& ctx)
+{ return (organism->getStateDiagram()->absoluteJumpDestinationState(3)); }
+
+bool cHardwareCPU::Inst_DestState4(cAvidaContext& ctx)
+{ return (organism->getStateDiagram()->absoluteJumpDestinationState(4)); }
+
+bool cHardwareCPU::Inst_DestState5(cAvidaContext& ctx)
+{ return (organism->getStateDiagram()->absoluteJumpDestinationState(5)); }
+
+bool cHardwareCPU::Inst_DestState6(cAvidaContext& ctx)
+{ return (organism->getStateDiagram()->absoluteJumpDestinationState(6)); }
+
+bool cHardwareCPU::Inst_DestState7(cAvidaContext& ctx)
+{ return (organism->getStateDiagram()->absoluteJumpDestinationState(7)); }
+
+bool cHardwareCPU::Inst_DestState8(cAvidaContext& ctx)
+{ return (organism->getStateDiagram()->absoluteJumpDestinationState(8)); }
+
+bool cHardwareCPU::Inst_DestState9(cAvidaContext& ctx)
+{ return (organism->getStateDiagram()->absoluteJumpDestinationState(9)); }
+
+bool cHardwareCPU::Inst_TransLab0(cAvidaContext& ctx)
+{ return (organism->getStateDiagram()->absoluteJumpTransitionLabel(0)); }
+
+bool cHardwareCPU::Inst_TransLab1(cAvidaContext& ctx)
+{ return (organism->getStateDiagram()->absoluteJumpTransitionLabel(1)); }
+
+bool cHardwareCPU::Inst_TransLab2(cAvidaContext& ctx)
+{ return (organism->getStateDiagram()->absoluteJumpTransitionLabel(2)); }
+
+bool cHardwareCPU::Inst_TransLab3(cAvidaContext& ctx)
+{ return (organism->getStateDiagram()->absoluteJumpTransitionLabel(3)); }
+
+bool cHardwareCPU::Inst_TransLab4(cAvidaContext& ctx)
+{
+return (organism->getStateDiagram()->absoluteJumpTransitionLabel(4)); }
+
+bool cHardwareCPU::Inst_TransLab5(cAvidaContext& ctx)
+{ return (organism->getStateDiagram()->absoluteJumpTransitionLabel(5)); }
+
+bool cHardwareCPU::Inst_TransLab6(cAvidaContext& ctx)
+{ return (organism->getStateDiagram()->absoluteJumpTransitionLabel(6)); }
+
+bool cHardwareCPU::Inst_TransLab7(cAvidaContext& ctx)
+{ return (organism->getStateDiagram()->absoluteJumpTransitionLabel(7)); }
+
+bool cHardwareCPU::Inst_TransLab8(cAvidaContext& ctx)
+{ return (organism->getStateDiagram()->absoluteJumpTransitionLabel(8)); }
+
+bool cHardwareCPU::Inst_TransLab9(cAvidaContext& ctx)
+{ return (organism->getStateDiagram()->absoluteJumpTransitionLabel(9)); }
+
+bool cHardwareCPU::Inst_TransLab10(cAvidaContext& ctx)
+{ return (organism->getStateDiagram()->absoluteJumpTransitionLabel(10)); }
+
+bool cHardwareCPU::Inst_TransLab11(cAvidaContext& ctx)
+{ return (organism->getStateDiagram()->absoluteJumpTransitionLabel(11)); }
+
+
+
\ No newline at end of file
Modified: branches/uml/source/cpu/cHardwareCPU.h
===================================================================
--- branches/uml/source/cpu/cHardwareCPU.h 2007-06-12 15:58:26 UTC (rev 1670)
+++ branches/uml/source/cpu/cHardwareCPU.h 2007-06-12 17:38:24 UTC (rev 1671)
@@ -85,10 +85,10 @@
protected:
// -------- Structure Constants --------
- static const int NUM_REGISTERS = 7;
+ static const int NUM_REGISTERS = 3;
static const int NUM_HEADS = nHardware::NUM_HEADS >= NUM_REGISTERS ? nHardware::NUM_HEADS : NUM_REGISTERS;
enum tRegisters { REG_AX = 0, REG_BX, REG_CX, REG_DX, REG_EX, REG_FX, REG_GX };
- static const int NUM_NOPS = 7;
+ static const int NUM_NOPS = 3;
// -------- Data Structures --------
struct cLocalThread
@@ -541,10 +541,49 @@
bool Inst_JumpIndex(cAvidaContext& ctx);
bool Inst_JumpDist(cAvidaContext& ctx);
// bool Inst_AddTransitionLabel(cAvidaContext& ctx);
-// bool Inst_AddTransition(cAvidaContext& ctx);
+ bool Inst_AddTransition(cAvidaContext& ctx);
bool Inst_AddTransitionTotal(cAvidaContext& ctx);
// bool Inst_Last(cAvidaContext& ctx);
// bool Inst_First(cAvidaContext& ctx);
+
+ bool Inst_StateDiag0(cAvidaContext& ctx);
+ bool Inst_StateDiag1(cAvidaContext& ctx);
+
+ bool Inst_OrigState0(cAvidaContext& ctx);
+ bool Inst_OrigState1(cAvidaContext& ctx);
+ bool Inst_OrigState2(cAvidaContext& ctx);
+ bool Inst_OrigState3(cAvidaContext& ctx);
+ bool Inst_OrigState4(cAvidaContext& ctx);
+ bool Inst_OrigState5(cAvidaContext& ctx);
+ bool Inst_OrigState6(cAvidaContext& ctx);
+ bool Inst_OrigState7(cAvidaContext& ctx);
+ bool Inst_OrigState8(cAvidaContext& ctx);
+ bool Inst_OrigState9(cAvidaContext& ctx);
+
+ bool Inst_DestState0(cAvidaContext& ctx);
+ bool Inst_DestState1(cAvidaContext& ctx);
+ bool Inst_DestState2(cAvidaContext& ctx);
+ bool Inst_DestState3(cAvidaContext& ctx);
+ bool Inst_DestState4(cAvidaContext& ctx);
+ bool Inst_DestState5(cAvidaContext& ctx);
+ bool Inst_DestState6(cAvidaContext& ctx);
+ bool Inst_DestState7(cAvidaContext& ctx);
+ bool Inst_DestState8(cAvidaContext& ctx);
+ bool Inst_DestState9(cAvidaContext& ctx);
+
+ bool Inst_TransLab0(cAvidaContext& ctx);
+ bool Inst_TransLab1(cAvidaContext& ctx);
+ bool Inst_TransLab2(cAvidaContext& ctx);
+ bool Inst_TransLab3(cAvidaContext& ctx);
+ bool Inst_TransLab4(cAvidaContext& ctx);
+ bool Inst_TransLab5(cAvidaContext& ctx);
+ bool Inst_TransLab6(cAvidaContext& ctx);
+ bool Inst_TransLab7(cAvidaContext& ctx);
+ bool Inst_TransLab8(cAvidaContext& ctx);
+ bool Inst_TransLab9(cAvidaContext& ctx);
+ bool Inst_TransLab10(cAvidaContext& ctx);
+ bool Inst_TransLab11(cAvidaContext& ctx);
+
};
Modified: branches/uml/source/main/cTaskLib.cc
===================================================================
--- branches/uml/source/main/cTaskLib.cc 2007-06-12 15:58:26 UTC (rev 1670)
+++ branches/uml/source/main/cTaskLib.cc 2007-06-12 17:38:24 UTC (rev 1671)
@@ -2650,7 +2650,8 @@
double bonus = 0.0;
// if (ctx.organism->currTrans(1, -1, -1, -1, -1, "^TempSensor.getOpState()")) {
// if (ctx.organism->currTrans(1, -1, -1, -1, -1, 1)) {
- if (ctx.organism->getUMLModel()->getStateDiagram(1)->findTrans(-1, -1, -1, -1, 1))
+// if (ctx.organism->getUMLModel()->getStateDiagram(1)->findTrans(-1, -1, -1, -1, 1))
+ if (ctx.organism->getUMLModel()->getStateDiagram(0)->findTrans(0, 1, 1, 2, 3))
{
@@ -2667,7 +2668,8 @@
double bonus = 0.0;
// if (ctx.organism->currTrans(0, -1, -1, "setTempOpState", -1, -1)) {
// if (ctx.organism->currTrans(1, -1, -1, 1, -1, -1)) {
- if (ctx.organism->getUMLModel()->getStateDiagram(1)->findTrans(-1, -1, 1, -1, -1))
+// if (ctx.organism->getUMLModel()->getStateDiagram(1)->findTrans(-1, -1, 1, -1, -1))
+ if (ctx.organism->getUMLModel()->getStateDiagram(0)->findTrans(1, 2, 0, 0, 0))
{
@@ -2684,7 +2686,8 @@
double bonus = 0.0;
// if (ctx.organism->currTrans(0, -1, -1, "getOpState", -1, -1)) {
// if (ctx.organism->currTrans(0, -1, -1, 1, -1, -1)) {
- if (ctx.organism->getUMLModel()->getStateDiagram(0)->findTrans(-1, -1, 1, -1, -1))
+// if (ctx.organism->getUMLModel()->getStateDiagram(0)->findTrans(-1, -1, 1, -1, -1))
+ if (ctx.organism->getUMLModel()->getStateDiagram(0)->findTrans(2, 3, 0, 3, 1))
{
@@ -2701,7 +2704,8 @@
double bonus = 0.0;
// if (ctx.organism->currTrans(0, -1, -1, -1, -1, "op_state:=1")) {
// if (ctx.organism->currTrans(0, -1, -1, -1, -1, 3)) {
- if (ctx.organism->getUMLModel()->getStateDiagram(0)->findTrans(-1, -1, -1, -1, 3))
+// if (ctx.organism->getUMLModel()->getStateDiagram(0)->findTrans(-1, -1, -1, -1, 3))
+ if (ctx.organism->getUMLModel()->getStateDiagram(0)->findTrans(3, 4, 2, 1, 2))
{
ctx.task_success_complete += 1;
@@ -2717,7 +2721,8 @@
double bonus = 0.0;
// if (ctx.organism->currTrans(0, -1, -1, -1, -1, "^SoftwareSensor.setTempOpState(op_state)")) {
//if (ctx.organism->currTrans(0, -1, -1, -1, -1, 1))
- if (ctx.organism->getUMLModel()->getStateDiagram(0)->findTrans(-1, -1, -1, -1, 1))
+// if (ctx.organism->getUMLModel()->getStateDiagram(0)->findTrans(-1, -1, -1, -1, 1))
+ if (ctx.organism->getUMLModel()->getStateDiagram(0)->findTrans(4, 0, 3, 0, 0))
{
Modified: branches/uml/source/main/cUMLModel.cc
===================================================================
--- branches/uml/source/main/cUMLModel.cc 2007-06-12 15:58:26 UTC (rev 1670)
+++ branches/uml/source/main/cUMLModel.cc 2007-06-12 17:38:24 UTC (rev 1671)
@@ -83,7 +83,18 @@
void cUMLModel::seedDiagrams()
{
self_bonus.clear();
-
+
+ // Used for simple example - expr0
+ cUMLStateDiagram* temp = getStateDiagram(0);
+ temp->addTransitionLabel(1, 2, 3);
+ temp->addTransitionLabel(0, 0, 0);
+ temp->addTransitionLabel(0, 3, 1);
+ temp->addTransitionLabel(2, 1, 2);
+ temp->addTransitionLabel(3, 0, 0);
+
+
+ // Used for Temperature Sensor / MultiSensor example.
+/*
// For the first state diagram...
// Software Sensor
cUMLStateDiagram* soft_sense = getStateDiagram(1);
@@ -150,9 +161,9 @@
temp_sense->addAction("data:=200");
// action 7
temp_sense->addAction("data:=300");
+*/
-
}
double cUMLModel::evaluateModel(int id, cWorld* world)
Modified: branches/uml/source/main/cUMLStateDiagram.cc
===================================================================
--- branches/uml/source/main/cUMLStateDiagram.cc 2007-06-12 15:58:26 UTC (rev 1670)
+++ branches/uml/source/main/cUMLStateDiagram.cc 2007-06-12 17:38:24 UTC (rev 1671)
@@ -96,6 +96,11 @@
template <typename T>
bool cUMLStateDiagram::absoluteMoveIndex (T x, int &index, int amount )
{
+
+ if (x.size() == 0 || amount > x.size()) {
+ return false;
+ }
+
index = 0;
return relativeMoveIndex(x, index, amount);
}
@@ -272,11 +277,12 @@
return false;
}
+*/
-// Broken - 5/17
+
bool cUMLStateDiagram::addTransition()
{
- /*
+
if ((states.size() == 0) || (transition_labels.size() == 0)) {
return false;
@@ -297,14 +303,33 @@
}
transitions.push_back(t);
+
+ orig_state_index = 0;
+ dest_state_index = 0;
+ trans_label_index = 0;
+ trigger_index = 0;
+ guard_index = 0 ;
+ action_index = 0;
-
return true;
}
-*/
+bool cUMLStateDiagram::addTransitionLabel(int tr, int gu, int act)
+{
+ transition_label t;
+ t.trigger = tr;
+ t.guard = gu;
+ t.action = act;
+ // currently, not checking for dupes, since we are seeding the labels.
+
+ transition_labels.push_back(t);
+}
+
+
+
+
bool cUMLStateDiagram::addTransitionTotal(int o, int d, int t, int g, int a)
{
if ((states.size() == 0)) {
Modified: branches/uml/source/main/cUMLStateDiagram.h
===================================================================
--- branches/uml/source/main/cUMLStateDiagram.h 2007-06-12 15:58:26 UTC (rev 1670)
+++ branches/uml/source/main/cUMLStateDiagram.h 2007-06-12 17:38:24 UTC (rev 1671)
@@ -133,11 +133,12 @@
// Add functions
bool addState();
// bool addTransitionLabel();
-// bool addTransition();
+ bool addTransition();
bool addTransitionTotal(int, int, int, int, int);
bool addTrigger(std::string, std::string);
bool addGuard(std::string);
bool addAction(std::string);
+ bool addTransitionLabel(int, int, int);
// END UML functions
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